Professor GyungSu Byun

Professor GyungSu Byun

Principal Investigator

Prof. Byun received the Ph.D. degree in EE (Electrical Engineering) from the UCLA, Los Angeles, California, USA. He is currently Full Professor and Director of the AI-powered Integrated Circuits/Systems (AIC) Lab with the Dept. of Electrical and Computer Engineering (ECE) of Inha University, Korea.


From 1999 to 2005, he was a Sr. Engineer with Samsung Electronics, where he worked on the design of high speed DRAMs such as DDR2, GDDR3, Rambus and XDR. In 2006, he was a research intern with Intel where he worked on the design of a cache memory and a 3D CMP with RISC core architecture. From 2007 to 2011, he was a Sr. Engineer with Inphi (acquired by Rambus and Marvell), where he worked on the design of advanced memory buffer, clocking circuit, and high speed IO circuit design between multi-core CPU and DRAM.


His research area includes AI-powered Analog IC and AI Systems design for energy-efficient high-performance computing, wireline/wireless communication and RF/THz electronics for sensing/imaging and biomedical applications. He is the author/co-author of over peer-reviewed 93 journal/conference papers/patents in the field of electronic circuits.


Prof. Byun was the recipient of the prestigious NSF CAREER Award (2014), NSF-FRS Award (2013) and the NSF BRIGE Award (2012).

93+
Publications & Patents
26+
Years Experience
3
NSF Major Awards

Professional Experience

2017 - Present
Full Professor (정교수)
Inha University, Korea
2014 - 2017
Associate Professor (부교수)
Southern Methodist University (SMU), Dallas, Texas, USA
2011 - 2014
Assistant Professor (조교수)
West Virginia University (WVU), Morgantown, West Virginia, USA
2007 - 2011
Senior Design Engineer
INPHI Corporation, Thousand Oaks, California, USA
Worked on the design of advanced memory buffer, clocking circuit, and high speed IO circuit design between multi-core CPU and DRAM.
2006
Researcher
INTEL Corporation, Hillsboro, Oregon, USA
Worked on the design of a cache memory and a 3D CMP with RISC core architecture.
1999 - 2005
Senior Design Engineer
Samsung Electronics, Korea
Worked on the design of high speed DRAMs such as DDR2, GDDR3, Rambus and XDR.

Awards & Honors

NSF CAREER Award
2014
Sole-PI, Presidential award by the National Science Foundation (미국과기부 대통령상)
NSF FRS Award
2013
Sole-PI, one of 15 awardees US nationwide (미국전역 15명, 최고연구상)
NSF BRIGE Award
2012
Sole-PI, one of 25 awardees US nationwide (미국전역 25명, 최고연구상)
Outstanding Researcher of the Year
2012
Recognized for exceptional contributions to research (올해과학연구우수상)
Senate Research Award
2012
Recognized for outstanding research achievements
PhD Study Abroad Scholarship
2005
Korea Science and Research Foundation (해외박사 국비전액장학생)

Editorial Boards & Technical Program Committee Activities

Serving as a reviewer and editorial board member for leading journals in the field:

    • IEEE Communication Magazine (CM) IF8.3
    • IEEE Journal of Solid-State Circuits (JSSC) IF4.6
    • IEEE Transactions on Circuits and Systems-I (TCAS)-I IF5.2
    • IEEE Transactions on Circuits and Systems-II (TCAS)-II IF4.0
    • IEEE Transactions on Biomedical Engineering (TBME) IF4.4
    • Nature Scientific Reports (SR) IF4.9
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI) IF2.8
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) IF2.7
    • ACM Transactions on Embedded Computing Systems (TECS) IF2.8

Additionally serves as a technical program committee member and reviewer for premier international conferences in integrated circuits and systems.